Maximizing High-Rise PCB Real Estate to Enable Electronic Product Design to Shrink
August 02, 2021
One trend that continues to define electronic product design is miniaturization. At every stage, smaller is better: from the channel length of transistors to the size of the end product. This is clear from the way communication devices, portable computers, and wearable electronics have shrunk since their inception (figure 1).
Figure 1: The evolution of communication devices.
But, it is also true that the outer dimensions of some products are effectively predefined, household devices such as washer dryers or microwave ovens need to continue to conform to predefined exterior dimensions. When they were first developed, their size may have been partly determined by the electronic components and systems on the inside, which is now a legacy that is hard to move past. For example, a router is still much the same size today as it was ten years ago but, open the case, and inside it is mostly empty.
This ‘smaller on the inside’ dichotomy still makes sense to electronic system manufactures, because size matters. Even if the space available inside the end product remains the same, the cost of manufacturing a smaller PCB is lower. Smaller PCBs also mean more space for batteries. Longer battery life is a key component of customer satisfaction. As not every device is saddled with legacy dimensions, many electronic products will continue to shrink, year after year.
Increasing Power Density Leads to Smaller Products
For many years, Moore’s Law has delivered higher levels of integration and commensurately smaller integrated circuits. More importantly, this higher integration has resulted in fewer components and subsequently smaller PCBs.
One area that doesn’t scale quite so well is power. In contrast to digital transistor features and power rails, which continue to come down, the overall density of power tends to increase over time. This is true for both the smallest digital signal transistor and the largest power switching transistor.
Historically, power management has gone hand in hand with size - in very general terms, the size of the channel of a power transistor is directly related to its power capacity. Many applications that involve high power, such as industrial and automotive, are on an upward trend. These typically require large power semiconductors, and with large semiconductors comes large power dissipation and heat generation. That heat then needs to be removed from the PCB, often with a heatsink or some form of forced air cooling or the maximum temperature capability of the components needs to increase.
Evolutionary improvements continue to be made in the way silicon power semiconductors operate, leading to higher efficiency, lower losses, and less waste heat generated. As these improvements are adopted, more power can be managed by smaller devices. This means that the power density of a product actually increases. In simple terms, the result is that either the end product can do more, or it can be made smaller. More often than not, the reality is a combination of the two.
But we are now witnessing something of a revolutionary change, with the widescale commercialization of wide bandgap (WBG) semiconductors. Specifically, this focuses on two WBG substrates; Gallium Nitride (GaN) and Silicon Carbide (SiC).
Power semiconductors based on GaN and SiC can operate more efficiently and at higher temperatures than silicon-based power semiconductors. There are numerous technical reasons for this, related to the ability to operate at higher switching frequencies, having lower parasitic capacitances, and lower on-resistances, but the result is all about power density (figure 2).
Figure 2: WBG offers higher power density.
The impact of higher power density is largely positive in commercial terms, but at a technical level it puts more pressure on other components that are less equipped to operate in such densely populated environments. Engineers are now beginning to see the consequences of higher power density at a system level. In order for these WBG semiconductors to achieve the promise of higher power density, they need supporting components capable of operation at higher temperatures, frequencies, and voltages.
All End-Markets Want Higher Power Density
Designs based on WBG technologies generally offer higher power density, so they can deliver more power in the same volume, or the same amount of power in a smaller volume. For those OEMs looking to extend the ‘smaller is better’ trend, size reduction is the most attractive proposition.
On the surface, this is an empowering technical development and there are many examples of how WBG is being used in power supply applications where size matters: from plug-in chargers/adapters to switched-mode power supplies in cellular base stations and data centers. And there is another benefit of WBG operating at higher switching frequencies; it also allows the size of the passive components to be reduced. These can easily be the biggest components on the PCB.
However, higher power density doesn’t come without design challenges. Not all components can operate at high temperatures, so power density is still limited by those components that are most sensitive to temperature. This can include passives such as capacitors. To take full advantage of higher power density, it may be necessary to move up the value chain in terms of passive components. For example, moving from film to ceramic capacitors may incur a higher unit price but deliver an end product that meets more demanding technical specifications.
This requires innovation. For example, KEMET has developed a range of ceramic capacitors based on its Class 1 dielectrics that operate at voltages and temperatures that are higher than other capacitors available on the market (figure 3). This allows them to be placed closer to active, switching power semiconductors that operate at high working temperatures. This results in higher power density and, therefore, smaller products.
Figure 3: KEMET’s KC-LINK Ceramic Capacitors for Power Applications
Stacked Capacitor Technology Allows Vertical Design
Another aspect of PCB design that is still a defining limitation is area. From the point of view of product design, PCBs are two-dimensional, with the third dimension being defined by the ‘tallest’ component. Just as cityscapes have developed over the last century to take advantage of the space above, PCBs can now do the same.
This has been put into practice with the development of KEMET’s KONNEKT™ technology (figure 4), which allows multiple ceramic capacitors to be stacked vertically on top of one another and surface-mounted on the PCB. The footprint required on the board is the same as the space needed for a single capacitor, but it now supports multiple capacitors stacked vertically. Using this stacking technology, engineers can implement capacitors able to handle voltages up to 2000 V DC and capacitances of up to 20 mF, but in a much smaller PCB area.
Figure 4: KONNEKT Technology enables higher power densities in smaller form factors
These ceramic capacitors have lower losses at high switching frequencies and higher maximum operating temperatures than film capacitors. The combination of lower capacitances needed at higher frequencies and the vertical stacking keep the PCB area needed at a reasonable level.
The stacking technology developed by KEMET addresses these limitations by enabling engineers to make use of the space above the PCB surface. Moving up, instead of out, will allow more compact power supply designs in a range of applications.
To learn more about how KEMET is enabling higher power density at the PCB level, or to receive the latest news and views on the challenges facing electronic design engineers, visit www.kemet.com.