Sonics and Moortec partner to provide temp-compensated DVFS capability for SoCs and MCUs
November 01, 2017
The New Power Management Solution Integrates Sonics? Energy Processing Units with Moortec?s Temperature Sensors to Improve Energy Efficiency.
Sonics, a supplier of on-chip network (NoC) and power management technologies and services, and Moortec, embedded in-chip sensing specialists, announced a partnership that results in advanced power management techniques for system-on-chip (SoC) and MCU designers. The partnership couples Sonics’ ICE-P3 with Moortec’s temperature sensors to enable temperature-compensated, dynamic voltage, and frequency scaling (DVFS) in IC designs intended for power-sensitive devices, such as mobile/handheld and IoT.
Employing DVFS lets chip designers dramatically reduce energy consumption by lowering frequency to match dynamic throughput conditions and simultaneously lowering the voltage to the minimum that safely supports that frequency. However, the minimum voltage depends upon both semiconductor process skew and on-chip temperature, which frequently causes energy-wasting overdesign to cover worst-case process and temperature conditions. While it’s increasingly common to re-optimize voltage values for process skew during manufacturing test, compensating for temperature requires on-chip thermal monitoring. Thermal sensors also provide invaluable alarm conditions that warn of thermal runaway conditions.
Moortec’s Embedded Temperature Sensor IP product line offers high testability and accuracy and allows for device performance optimization and device characterization. ICE-P3 automates DVFS implementation and is part of the ICE-Grain family of energy processing units (EPUs) that identifies, sequences, and controls power-state transitions in hardware faster than conventional software-based approaches. In the combined solution, the EPU modulates the requested voltage to deliver a desired frequency based on directly-connected temperature sensor data. In addition, thermal alarms can be connected to the EPU to force power-state changes that reduce heat generation, such as slowing down or shutting off IP cores or subsystems.