Intel and MIPS Combine on Intel's Pathfinder for RISC-V

By Chad Cox

Production Editor

Embedded Computing Design

September 07, 2022


MIPS is working with Intel to accelerate innovation in open computing

MIPS is collaborating with Intel to boost open computing innovation. The new Intel Pathfinder for RISC-V, a platform created to deliver additional capabilities for pre-silicon development, is being enhanced with MIPS' eVocore as part of this endeavor. System-on-a-Chip (SoC) architects and system software developers now have more options for defining new products and pursuing RISC-V pre-silicon software development thanks to Intel® Pathfinder.

The new eVocore P8700 and I8500 multiprocessor IP cores are the first MIPS products built on the RISC-V open instruction set architecture (ISA) standard and have best-in-class power efficiency for usage in SoC applications.

MIPS cores are integrated into a single IDE on the Intel Pathfinder FPGA development platform, which also supports leading operating systems and industry-standard toolchains. Future potential for developers to swiftly create prototypes for industries like automotive, which have more Functional Safety (FuSa) requirements, will be made possible by this.

As RISC-V adoption picks up speed, several businesses are utilizing the open architecture to build specialized processors that can manage the power and performance demands of more recent workloads for artificial intelligence, machine learning, virtual/augmented reality, and other applications.

Start your journey with Intel Pathfinder for RISC-V at

Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.

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