Renesas Pioneers RISC-V Technology With RZ/Five General-Purpose MPUs Based on 64-Bit RISC-V CPU Core

By Tiera Oliver

Associate Editor

Embedded Computing Design

June 28, 2022

News

Renesas Pioneers RISC-V Technology With RZ/Five General-Purpose MPUs Based on 64-Bit RISC-V CPU Core

Renesas Electronics announced the RZ/Five general-purpose microprocessor units (MPUs) built around a 64-bit RISC-V CPU core.

The RZ/Five employs the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA). The RZ-Five augments Renesas’ previously available Arm CPU core–based MPUs, expanding customer options and providing more flexibility in the product development process.

Demand is increasing for IoT endpoint devices, such as gateways for solar inverters or home security systems, to collect sensor data and connect to servers or to the cloud. In response to this need, RZ/Five is optimized to provide the performance and peripheral functions required of IoT endpoint devices. Its maximum operating frequency is 1 GHz. Peripheral functions include support for multiple interfaces, such as two Gigabit Ethernet channels, two USB 2.0 channels, and two CAN channels, as well as dual A/D converter modules. Support is also provided for connecting external DDR memory with error checking and correction (ECC) and security functions.

As with the RZ/G Series, a Verified Linux Package (VLP) featuring Civil Infrastructure Platform (CIP) Linux, an industrial-grade Linux offering long-term maintenance support for more than 10 years, is available for RZ/Five. This makes the RZ/Five series an ideal product in corporate infrastructure and industrial applications that require a high level of reliability and extended service life. It also allows users to reduce future Linux maintenance costs.

The peripheral functions and package of RZ/Five are compatible with those of the Arm core–based RZ/G2UL, allowing for the reuse of proven designs. The RZ/Five also comes in a small, compact package to address less complex designs more efficiently. As an evaluation environment, an RZ SMARC Evaluation Board Kit will be offered with a module board conforming to the SMARC 2.1 standard, equivalent to the currently available environment for the RZ/G Series. This kit allows switching and evaluating between an RZ/Five CPU module and an RZ/G2UL CPU module, enabling evaluation and shortening product development cycles.

Renesas will provide a complete system solution for the RZ/Five CPU module including Renesas’ DA9062 power management IC, 5P35023 programmable clock generator, AT25QL128A flash memory, and SLG46538 GreenPAK IC implementing peripheral functions such as system reset. These devices can work together with the SMARC System for Single Core Cortex-A55 MPU, that can be used as reference designs to reduce product development time.

Samples of the RZ/Five MPUs are available starting today, and mass production is scheduled to begin in July 2022.

For more information, please visit: https://www.renesas.com/rzfive.

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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