POLYN Technology Announces First Silicon-Implemented NASP Chip
October 28, 2025
News
Booth HB143, CES Unveiled Europe, Amsterdam – October 28, 2025 – POLYN Technology announced the successful manufacturing and testing of the world’s first silicon-proven implementation of its unique NASP (Neuromorphic Analog Signal Processing) technology.
The NASP platform utilizes trained neural networks in the analog domain to perform AI inference with lower power consumption compared to conventional digital neural processors.
POLYN will demonstrate its first NASP chips, available for ordering at CES 2026 in Las Vegas, Nevada, January 6-9, in Hall G, Booth #61701. The company will also showcase a limited selection at CES Unveiled Europe in Amsterdam.
NASP chips with AI cores process sensor signals in their native analog form in microseconds, using microwatt-level power and eliminating all overhead associated with digital operations. This is ideal for always-on edge devices. Application-specific NASP chips can be designed for a diverse range of edge AI applications, including audio, vibration, wearable, robotics, industrial, and automotive sensing.
This key milestone validates both NASP technology and POLYN’s revolutionary design tools, which automatically convert trained digital neural network models into ultra-low-power analog neuromorphic cores ready for manufacturing in standard CMOS processes. The testing confirmed the chip's parameters strictly match its model.
“This is not just another chip — it’s proof that our novel technology works in silicon,” said Aleksandr Timofeev, CEO and Founder of POLYN Technology. “For the first time, we generated an asynchronous, fully analog neural-network core implementation in silicon directly from a digital model. It opens the door to an entirely new design paradigm — neural computation in the analog domain, with digital-class accuracy and microwatt-level energy use.”
This first chip contains a VAD core for real-time voice activity detection. It marks the first step toward a new level of voice processing offered by POLYN. It will be followed by other cores POLYN is developing for speaker recognition and voice extraction, enhancing home appliances, critical communications headsets, and other voice-controlled devices.
Customers developing products with ultra-low power voice control can apply online for the NASP VAD chip evaluation kit.
The first NASP VAD chip offers breakthrough performance:
- Ultra-low power: approximately 34 µW during continuous operation
- Ultra-low latency: 50 microseconds per inference
- Fully asynchronous operation: no clock, no ADC/DAC conversion
POLYN’s NASP technology and design tools give semiconductor and AI developers a new way to quickly implement neural networks directly in analog silicon. It offers process-agnostic design across 40–90 nm CMOS nodes and automatic conversion from digital ML models.
POLYN is preparing evaluation kits for early adopters and extending the implementation of its NASP product families for automotive, critical communication, and wearable applications.
For more information, visit: https://polyn.ai/
Tiera Oliver, Assistant Managing Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She develops content and constructs ECD podcasts, such as Embedded Insiders. Before working at ECD, Tiera graduated from Northern Arizona University, where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student-led newspaper, The Lumberjack.
