The SoC Evolution: From Early Handsets To Edge Intelligence
June 30, 2021
While SoCs are inarguably enabling the IoT’s connectivity and computation, the term has become an industry buzzword, making it difficult to distinguish SoCs from other types of Integrated Circuits (ICs).
An SoC integrates multiple electronic functions on a single chip versus single-function chips, such as power management chips. A high-quality SoC consists of a cohesive ensemble of hardware and software functions running on a miniature piece of silicon.
Other semiconductor products can be qualified based on the number of transistors they squeeze onto one chip; however, this qualification does not accurately reflect the quality and complexity of the functions integrated on an SoC. In fact, it’s actually a sign of masterful integration to build the same number of functions on an SoC with a smaller transistor count.
SoCs’ Unknown History
It may surprise some in the industry, but some SoCs actually predated the formal introduction of the SoC category. The Computer History Museum claims the first true SoC appeared in a Microma watch in 1974. However, a quick browse through The Art of Electronics (1989) shows diagrams that look a lot like an SoC, with stepping motor control, analog-to-digital converters, serial I/O, integrated ROM, timers, and event controllers. These early SoCs had another name that indicated their function rather than their structure: Application Specific Standard Product (ASSP).
For much of their history, SoCs have evolved outside the sphere of the public view. Because they are developed by competitive tech companies, most of their early conceptualizations are shrouded in the secrecy and protection of intellectual property laws. However, there are clear techno-economical advancements that made SoCs not only possible but necessary.
In the late 1990s, the cell phone revolution incentivized the integration of multiple functions on a single chip. Remember how bulky handsets used to be? Old handsets contained at least a dozen chips performing all sorts of functions: a CPU handling the networking configurations, user interface, and all the high-level functions; the RAM and Flash associated with the CPU; a baseband digital signal processor running the mathematically intensive calculations for physical channel and speech coding; and a mixed-signal IC that managed the radio frequency (RF) transceiver. To continue advancing handsets’ functions and make them more appealing to consumers, manufacturers sought further integration and miniaturization.
The rise of semiconductor IP unlocked the possibility of this integration. IP cores and IP blocks are silicon designs (rather than physical chips) that could be integrated onto other chip designs as building blocks of a bigger system. The IP block could be memory, I/O, or processor cores. Semiconductor companies began adding processor cores and memory units to their chip designs. The integration of multiple modules was made possible when the design of such modules became available as a black box for sale by semiconductor IP companies, and thus, the era of the SoC was ushered in.
SoCs today can do more than early computers
SoCs reduced the number of chips on a handset by at least 10-fold. Integrating discrete components on a single chip provided distinctly improved efficiency with shorter interconnects and system-level optimizations available to the SoC designer, enabling power consumption to drop significantly. As a result, handsets grew smaller while performance proliferated, and batteries lasted longer.
Over the past two decades, handsets evolved into smartphones with the advent of further integration and elaborate optimization. Generations of SoC design and optimization provided the vehicle for technological improvements that started in the early handset days and led us to where we are today.
Rise to the Building Block of IoT
Another important catalyst in the evolution of SoCs has been the emergence of the IoT. The possibility of connecting all things to the web with miniature, power-efficient chips meant that we needed to integrate more and more functions onto a single chip. The interest in building faster, interoperable IoT networks led to the rise of wireless SoCs, which integrate an RF transceiver, a general-purpose microcontroller unit (MCU), numerous high-performance peripherals (amplifiers, ADCs, DACs), and non-volatile memory to handle both the application processing and network protocol stack while simultaneously providing the RF link to the wireless network.
A wireless SoC consists of hardware functional units, including microprocessors that run software code and a communications subsystem to connect, control, direct, and interface among these functional modules. SoCs comprise many execution units that must often send data and instructions back and forth, meaning all but the most trivial SoCs require communications subsystems. Originally, as with other microcomputer technologies, data bus architectures were used, but many designs now utilize more sparse intercommunication networks.
An example of a modern day wireless SoC is the Silicon Labs EFR32 Series 2 Multiprotocol. One can appreciate the tremendous number of integrated subsystems.
IoT end-node products require optimal power consumption and miniaturization. If IoT aims to attach electronics to everything, the electronics need to be tiny and stay powered up as long as possible on small battery cells. This is made possible by compromising the processing power of the SoCs.
Unlike personal computers and smartphones that can incorporate a general-purpose interoperable operating system on their relatively expansive memory storage, SoCs trade their processing power and memory size for the sake of miniaturization and reduced power consumption. Fortunately, due to the very specific nature of wireless IoT SoCs, their software can be optimized for each specific use case. While this enables smaller, more efficient devices, it increases the complexity of the SoC software. SoCs that sit within a larger system might require interfacing software to properly operate within the greater system. For stand-alone SoCs operating as IoT end-nodes, the software stack requirements become quite sophisticated. It is fair to say that a wireless SoC consists of two major interdependent subsystems: software and silicon.
Another extremely important subsystem in wireless SoCs is security. While security is entangled with hardware and software, it is worth viewing it as its own subsystem, as the security of an SoC is only as strong as its weakest link. IoT devices may encounter various levels of threats and therefore require security at each level, including firmware, network, and user authentication level.
Moving to the Edge and Beyond
The net worth of connected devices worldwide is estimated to grow to 51.9 billion by 2025. (Source: Omdia). One of the most highly anticipated developments in the IoT is the infusion of artificial intelligence and machine learning in edge devices. Edge intelligence refers to processes in which data is collected and analyzed, and insights are delivered close to where it is captured on the edge network. These processes enable IoT networks to make decisions locally, rather than sending data to a cloud and receiving decisions back. Edge intelligence pays dividends in power-saving since one of the most power-hungry operations within wireless SoCs is RF transmission. In addition to saving power, deploying machine learning on edge networks will eliminate the need to transfer vast volumes of data generated by IoT devices to the cloud, which can be time-consuming, highly expensive, and lead to data privacy concerns.
As AI and machine learning are further integrated into edge devices, SoCs will continue to play a key role in the evolution of the IoT. We can expect to see new technologies bring SoCs into future generations of higher computing power, enabled by better and more efficient semiconductor manufacturing and design technologies.
Asem Elshimi is the Product Marketing Manager and the segment lead of Building Automation of IoT wireless solutions at Silicon Labs. He joined Silicon Labs in July 2018 as an RF designer. Asem is passionate about enabling Smart Buildings with optimal operational and energy efficiency. He holds an M.S. in Electrical and Computer Engineering from the University of California, Davis.