Ultra-Low-Power Wireless SoC Integrates an NPU

By Rich Nass

Contributing Editor

Embedded Computing Design

March 26, 2026

Blog

Ultra-Low-Power Wireless SoC Integrates an NPU

The Nordic Semiconductor nRF54LM20B is a wireless SoC in the company’s nRF54L series that combines an MCU, low-power wireless connectivity, and on-chip AI acceleration. The device integrates up to 2 Mbytes of nonvolatile memory and 512 kbytes of RAM, the largest memory configuration in the series.

It also includes an expanded peripheral set, high-speed USB, and support for as many as 66 GPIOs, allowing it to serve as a central controller in embedded designs that require multiple interfaces.

An integrated Axon NPU is included to accelerate machine-learning inference at the edge. Offloading inference workloads from the CPU to the NPU can improve execution efficiency and increase inference performance by roughly an order of magnitude compared with running the same workloads on the CPU alone. The architecture is intended to allow AI tasks to be handled locally without relying on cloud resources.

Wireless connectivity is handled through an integrated 2.4-GHz radio supporting Bluetooth LE as well as protocols used in IoT networking such as Matter, Thread, Zigbee, and proprietary 2.4-GHz links with data rates up to 4 Mbits/s. Additional capabilities include Bluetooth Mesh and Channel Sounding. When paired with companion devices from the Nordic Semiconductor nRF70 Series, the platform can also support Wi-Fi connectivity.

Radio power consumption is specified at roughly 3.4 mA in receive mode and 4.8 mA when transmitting at 0 dBm. Sleep-mode current ranges from about 0.7 to 4.0 µA at 3 V, depending on the operating state. Maximum transmit power reaches +8 dBm in the CSP package and +7 dBm in the QFN version. Receiver sensitivity is specified at -96 dBm for 1-Mb/s Bluetooth LE operation and -101 dBm for 802.15.4.

The device is intended to simplify embedded designs that require wireless connectivity and local AI processing by integrating compute, radio, and acceleration resources on a single chip. This approach can reduce external components while supporting battery-powered operation through relatively low active and standby power consumption. The architecture also incorporates hardware security features intended to help designers meet common IoT security and regulatory requirements.

Rich Nass is a regular contributor to Embedded Computing Design. He has appeared on more than 500 episodes of the popular Embedded Executive podcast series, and is a regular contributor to the Embedded Insiders podcast.

Rich has been in the engineering OEM industry for more than 35 years, and is a recognized expert in the areas of embedded computing, Edge AI, industrial computing, the IoT, and cyber-resiliency and safety and security issues. He writes and speaks regularly on these topics and more.

Rich is currently the Liaison to Industry for the Embedded World North America Exhibition and Conference, and has held similar positions with the global Embedded World Conference and Exhibition.

Previously, Rich was the Brand Director for UBM’s award-winning Design News property. Prior to that, he led the content team for UBM Canon’s Medical Devices Group, as well all custom properties and events.  In prior stints, he led the Content Team at EE Times, handling the Embedded and Custom groups and the TechOnline DesignLine network of design engineering web sites.

Nass holds a BSEE degree from the New Jersey Institute of Technology.

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