Renesas Creates Circuit Technologies for 22-nm Embedded STT-MRAM with Faster Read and Write Performance for IoT MCUs
June 23, 2022
News
Renesas Electronics Corporation announced the development of circuit technologies for a 22-nm embedded spin-transfer torque magnetoresistive random-access memory (STT-MRAM, hereinafter MRAM) test chip with fast read and write operations.
The test chip has a 32-megabit (Mbit) embedded MRAM memory cell array and a random read access time of 5.9 nanoseconds (ns) at a maximum junction temperature of 150°C, as well as a write throughput of 5.8 megabytes per second (MB/s).
Renesas presented these accomplishments on June 16 at the 2022 IEEE Symposium on VLSI Technology and Circuits.
As IoT and AI technologies continue to advance, microcontroller units (MCUs) used in endpoint devices are expected to deliver higher performance than ever before, necessitating the use of finer process nodes. MRAM fabricated in BEOL is preferable to flash memory fabricated in FEOL for sub-22 nm processes because it is compatible with existing CMOS logic process technology and requires fewer additional mask layers.
However, MRAM has a lower read margin than flash memory, which reduces read speed. A large gap between the CPU operating frequency and the read frequency of non-volatile memory is also a challenge because it can degrade MCU performance.
MRAM can also achieve faster write times than flash memory because it does not require an erase operation before writing. However, additional speed improvements are required to reduce system downtime for over-the-air (OTA) updates required for endpoint devices and to lower costs for end product manufacturers in writing control codes for MCUs.
Renesas has developed the following new circuit technologies to achieve faster read and write operation in MRAM to address these challenges and respond to market demand for higher MCU performance.
Fast Read Technology Employing High-Precision Sense Amplifier Circuit
MRAM stores information in memory cells such as magnetic tunnel junction (MTJ) devices, where high and low resistance states correspond to data values of 1 and 0, respectively. A differential sense amplifier can tell the difference between the two states by measuring the voltage difference in discharge speed between the memory cell current and the reference current.
However, because the difference in memory cell current between the 1 and 0 states in MRAM is smaller than in flash memory, the voltage difference read by the sense amplifier is smaller. Even if the discharge time is extended to allow for greater voltage differences between the sense amplifier's differential input nodes, both input nodes are susceptible to being completely discharged before securing the required voltage difference. This issue is exacerbated by high temperatures.
To address this issue, Renesas developed a new technology that uses capacitive coupling to increase the voltage level of the differential input nodes, allowing the differential amplifier to detect a voltage difference even when the memory cell current difference is small, resulting in high-precision and fast read operation.
Fast Write Technology with Simultaneous Write Bit Number Optimization and Shortened Mode Transition Time
Following the announcement of high-speed write technologies for embedded STT-MRAM in December 2021, the new technology achieves even greater speed by reducing mode transition time during write operation.
This technology divides the areas to which write voltage is applied and, by inputting the write address prior to the write voltage setup, selectively applies voltage only to the required area. This method reduces the parasitic capacitive load on the area where the voltage is applied during the write operation, thereby decreasing voltage setup time. As a result, the mode transition time to write operation is reduced by approximately 30%, resulting in faster write operation.
Renesas continues to research and develop technologies for the use of embedded MRAM technology in MCU products. These new technologies have the potential to significantly increase memory access speed, which is currently a challenge with MRAM, to more than 100 MHz, allowing for higher-performance MCUs with embedded MRAM.
Increased write speed contributes to more efficient code writing to endpoint devices. Renesas is committed to increasing MCU capacity, speed, and power efficiency to support a wide range of new applications.
For more information, visit renesas.com.
Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.
