TSMC Certifies Aprisa Place-And-Route Solution from Siemens on TSMC‘s N6 process
April 22, 2021
News
Siemens announced that its collaboration with foundry partner TSMC has resulted in the certification of its Aprisa place-and-route solution for TSMC’s advanced N6 process.
TSMC’s advanced N6 process is an enhancement of the 7-nanometer (nm) family of technologies.
Siemens’ Aprisa product line is next-generation place-and-route technology, created to design advanced integrated-circuits (ICs). Engineered to help enable ideal results, the Aprisa tools offer complete gate-level-to-GDSII hierarchical and block level physical implementation solutions. Siemens acquired the Aprisa tools from Avatar Integrated Systems in August 2020 to extend its portfolio of IC EDA software.
To achieve this latest certification, the Aprisa tools passed a suite of rigorous criteria to confirm that the Siemens place-and-route software is ready for mutual customers to start their IC designs on the TSMC N6 process.
“The innovative detailed-route-centric technology that powers our Aprisa tools is ideal for IC designs at advanced process nodes,” said Inki Hong, senior director of the Aprisa product line for Siemens Digital Industries Software. “The newest Aprisa certification that we achieved with TSMC further enables mutual customers to leverage Aprisa’s technology for design success at TSMC’s industry-leading N6 process.”
Under the Avatar banner, and now as a part of Siemens EDA, the Aprisa team has a history of collaboration with TSMC. In addition to previous collaboration for multiple technology nodes starting from 40nm down to 7nm, Aprisa is now qualified to run on TSMC’s advanced N6 technology.
TSMC’s certified N6 functionality is available in Aprisa 20.1.rel.2 and later versions. Aprisa 20.1.rel.2 is available now from Siemens Digital Industries Software.
For more information, visit: https://www.plm.automation.siemens.com/global/en/our-story/newsroom/tsmc-certifies-aprisa-place-and-route-solution-on-n6-process/96670
Tiera Oliver is the assistant managing editor at Embedded Computing Design. She is responsible for web content editing, product news, and story development. She also manages, edits, and develops content for ECD podcasts, including Embedded Insiders.
She utilizes her expertise in journalism and content management to oversee editorial content, coordinate with editors, and ensure high-quality output across web, print, and multimedia platforms. She manages diverse projects, assists in the production of digital magazines, and hosts company podcasts by conducting in-depth interviews with industry leaders to deliver engaging and insightful discussions.
Tiera attended Northern Arizona University, where she received her bachelor's in journalism and political science. She was also a news reporter for the student-led newspaper, The Lumberjack.
