Microchip Introduces First 3 nm PCIe Gen 6 Switch
October 13, 2025
News
CHANDLER, Ariz., October 13, 2025 — Microchip Technology introduced its next generation of Switchtec™ Gen 6 PCIe® Switches. According to the company, these are the industry’s first PCIe Gen 6 switches manufactured using a 3nm process.
The Switchtec Gen 6 family is designed to deliver lower power consumption and support up to 160 lanes for high-density AI system connectivity. Advanced security features include a hardware root of trust and secure boot, utilizing post-quantum safe cryptography compliant with the Commercial National Security Algorithm Suite (CNSA) 2.0.
PCIe 6.0 is designed to double the bandwidth of PCIe 5.0 to 64 GT/s (giga transfers per second) per lane, providing the necessary data pipeline to keep AI accelerators consistently supplied. Switchtec Gen 6 PCIe switches enable high-speed connectivity between CPUs, GPUs, SoCs, AI accelerators, and storage devices, and are designed to help data center architects scale to the potential of next-generation AI and cloud infrastructure.
By acting as a high-performance interconnect, the switches enable simpler, more direct interfaces between GPUs in a server rack for minimizing signal loss and maintaining the low latency required by AI fabrics. The PCIe 6.0 standard also introduces Flow Control Unit (FLIT) mode, a lightweight Forward Error Correction (FEC) system, and dynamic resource allocation. These changes are designed to make data transfer more efficient and reliable, especially for small packets in AI workloads.
Switchtec Gen 6 PCIe switches feature 20 ports and 10 stacks, with each port featuring hot- and surprise-plug controllers. Switchtec also supports NTB (Non-Transparent Bridging) to connect and isolate multiple host domains and multicast for one-to-many data distribution within a single domain. The switches are designed with advanced error containment and comprehensive diagnostics and debug capabilities, a wide variety of I/O interfaces, and an integrated MIPS processor with bifurcation options at x8 and x16. Input and output reference clocks are based on PCIe stacks with four input clocks per stack.
The Switchtec Gen 6 PCIe Switch family is supported by Microchip’s ChipLink diagnostic tools, offering debug, diagnostics, configuration, and analysis through an intuitive graphical user interface (GUI). ChipLink connects via in-band PCIe or sideband signals such as UART, TWI, and EJTAG, enabling monitoring and troubleshooting throughout design and deployment. The switches are also supported by the PM61160-KIT Switchtec Gen 6 PCIe Switch Evaluation Kit with multiple interfaces.
Switchtec Gen 6 PCIe switches are available for sampling to qualified customers.
For more information, visit: https://www.microchip.com/en-us/products/interface-and-connectivity/pcie-switches
Tiera Oliver, Assistant Managing Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She develops content and constructs ECD podcasts, such as Embedded Insiders. Before working at ECD, Tiera graduated from Northern Arizona University, where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student-led newspaper, The Lumberjack.
