ASA Alliance Welcomes Mixel’s Groundbreaking ASA-ML v2.1 SerDes IP Offering

By Chad Cox

Production Editor

Embedded Computing Design

July 23, 2025

News

ASA Alliance Welcomes Mixel’s Groundbreaking ASA-ML v2.1 SerDes IP Offering
Image Credit: Mixel

San Jose, California. Mixel, Inc. announced today that it is the first true silicon IP provider to support Automotive SerDes Alliance Motion Link (ASA-ML) SerDes IP compliant with the ASA Motion Link v2.1 specification. The Mixel ASA-ML PHY IP enables version 2.1 of the Automotive SerDes Alliance Motion Link specification with transmitting (TX) and receiving (RX) downstream speeds of up to 8.0Gbps/lane with NRZ signaling (Speed Grade 3).

“Silicon IP providers are instrumental in driving the growth of the ASA ecosystem. They empower third-party silicon vendors to bring innovative ASA-ML products to market without the need to invest in transceiver development,” said Christoph Arndt, Chair of the Automotive SerDes Alliance.

The Mixel PHY delivers wide-ranging equalization features for managing different channels, environmental conditions, and data rates. Additionally, it implements comprehensive DFT testability features for mass production and system test for link strength.

ASA Alliance is a non-profit comprising of automotive industry and technology providers collaborating to deliver the specifications and infrastructure needed for automotive applications.

“The expertise from Mixel is a welcome addition to the Automotive SerDes Alliance,” added Dr. Kirsten Matheus, Chair of ASA Technical Committees A and B. “Their decision to offer ASA-ML SerDes IP demonstrates the growing momentum behind ASA-ML and marks an important step toward realizing ASA’s mission of standardized, interoperable in-vehicle connectivity.”

For more information, visit mixel.com

Chad Cox is the Production Editor at Embedded Computing Design. His responsibilities are centered around content creation, writing and editing, and article research and development. Chad covers industry news and events and is known to interact with various industrial leaders via on-premise visits and online interviews. He is responsible for the digital footprint and dissemination of news via social media posts, advertising creation and the production of newsletters including the Embedded Computing Design’s Daily.

He is well versed in many facets of industrial computing including Edge AI, IoT, Processing, Security, Open Source, and more.

Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature and holds a master’s in education.

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