QuickLogic Breaks Ground with Sub-5nm eFPGA Hard IP for Intel 18A
April 29, 2025
News
QuickLogic Corporation released its eFPGA Hard IP optimized for Intel 18A technology to a client that chose QuickLogic's IP for its Test Chip. According to QuickLogic, this is the first time eFPGA Hard IP has been supplied for a sub-5nm process node. This solution is expected to set new standards for low power consumption, high performance, and ideal silicon area utilization (PPA).
In just six months, QuickLogic delivered the first eFPGA Hard IP for Intel 18A, made possible by its Australis IP Generator. The QuickLogic eFPGA Hard IP is cohesive with two versions of its FPGA User Tools, the open-source Aurora for full design transparency and the enhanced Aurora Pro, which includes Synopsys Synplify FPGA Logic Synthesis.
"For more than three decades, QuickLogic has built a strong reputation as a trusted supplier of Size, Weight, Area, Performance and Cost (SWaP-C)-optimized programmable logic for both defense and commercial markets," said Brian Faith, CEO of QuickLogic. "With our proven eFPGA Hard IP now available for Intel 18A, we're able to quickly deliver customer-specific variants that reduce program risk and lower the cost of using eFPGA technology."
For more information, visit quicklogic.com.
Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.
