Sonics' ICE-Grain power architecture saves energy in SoC designs
May 29, 2015
For designers that are looking for an automated power solution at the SoC level, the ICE-Grain (Instant Control of Energy) power architecture is worth...
For designers that are looking for an automated power solution at the SoC level, the ICE-Grain (Instant Control of Energy) power architecture is worth a look. Unveiled recently by Sonics, it provides a “worry-free implementation at the highest level of abstraction,” according to the company. It’s comprised of configurable hardware IP blocks, embedded control software, and an integrated design tool environment.
Using the architecture, SoC designers partition their chips into finer “grains,” which enables faster and more precise power control. Sonics defines the grains as very small sections of an SoC that include functional logic that can be power controlled individually using various savings methods. A grain is connected to one or more clock domains and attached to at least one power domain, and includes defined signals and conditions for power control. Grains are often an order of magnitude smaller than conventionally independent power or clocking domains, and multiple grains can be composed into larger hierarchical grains.
The ICE-Grain architecture automates the tasks of grain connection and management by synthesizing both central and local control circuitry blocks for the greatest total SoC power reduction. Areas that can take advantage of the architecture include many of the typical high-volume applications, such as consumer, IoT, mobile, wearables, automotive, and set-top box markets.
Specifically, ICE-Grain addresses the number of clocking, power and voltage domains that require independent control is increasing. Because the number of power events that need to be processed is rising, they must be managed at run-time to satisfy power constraints. EDA tool support complies with industry-standard tools, flows, and formats.